===== Default memory map =====
This is a default memory map. The slave devices should implement most of these registers.

^  Addr hex((Register address in hex format))  ^  High((Upper 16bit word))  ^  Low((Lower 16 bit word))  ^  Cmds((Implemented commands GR-Get Register, SR-Set Register, 
GB-Get Block, SB-Set Block))  ^  Save in EE((The register value will be saved in PIC EEPROM and restored on power-up))  ^ Description  ^
|  0x0000  |   |  REG_FWREV  |  GR  |  No  | PIC_FWREV PIC firmware revision	|
|  0x0001  |   |  REG_RSREG  |  GSR  |  No  | Indicates the status of the unit and reason for the last reset, see detailed description.	|
|  0x0002  |   |  REG_RSCOUNT  |  GR  |  No  | Indicates number of resets since the unit was powered up.	|
|  0x0003  |   |  REG_UPTIME  |  GSR  |  No  | Device uptime since last reboot in seconds |
|  0x0004  |   |  REG_STATUS  |  GR  |  No  | Device status, application speciffic |
|  0x0005  |   |  REG_FLOCK  |  GSR  |  No  | FLASH  lock, firmware upgrade register	|
|  0x0006  |   |  REG_EELOCK  |  GSR  |  No  | EEPROM lock	|
|  0x0007  |  VPWR1F  |  REG_VPWR1  |  GR,GB  |  No  | GR returns supply voltage 1 value as integer in 0.1V, GB returns IEEE float  |
|  0x0008  |  VPWR2F  |  REG_VPWR2  |  GR,GB  |  No  | GR returns supply voltage 2 value as integer in 0.1V, GB returns IEEE float  |
|  0x0009  |  VPWR3F  |  REG_VPWR3  |  GR,GB  |  No  | GR returns supply voltage 3 value as integer in 0.1V, GB returns IEEE float  |
|  0x000A - 0x000F |   |  APP  |  GSR  |  No  | Application speciffic  |
|  0x0010  |  RTC_DATETIME  ||  GSB  |   No  | (RTC) Date and time in second since 00:00:00 UTC on Thursday, 1 January 1970 (ISO C defined)  |
|  0x0011 - 0x00FF |   |  APP  |  GSR  |  No  | Application speciffic  |
|  0x0100  |  SERIAL_NUMBER  ||  GSB  |  Yes  | Device serial number, uint32  |
|  0x0101 - 0x0105  |  PARTNUM[0]-[19]  ||  GSB  |  Yes  | 20 bytes, ASCII Alphanumeric device part number, char[20], LSB at byte 0 of 0x0101  |
|  0x0106 - 0x010A  |  ANAME[0]-[19]  ||  GSB  |  Yes  | 20 bytes, ASCII Alphanumeric device name/description, char[20]  |
|  0x010B  |   |  REG_COMMAND  |  GSR  |	 Yes  | Command register, see description		|
|  0x010C  |   |  REG_UTILITY  |  GSR  |	 Yes  | Utility register, see description		|
|  0x010D - 0x010F  |    |    |    |	 Yes  | Application speciffic		|
|  0x0110  |   |  REG_MODID  |	GSR  |  Yes  | Module ID = USP module address	|
|  0x0111  |   |  REG_RS1_SPEED  |  GSR  |  Yes  | Communication speed of the first RS232 interface. Value in Bd. Default 38400|
|  0x0112  |   |  REG_RS2_SPEED  |  GSR  |  Yes  | Communication speed of the second RS232 interface. Value in Bd. Default 38400|
|  0x0113  |   |  REG_RS3_SPEED  |  GSR  |  Yes  | Communication speed of the third RS232 interface. Value in Bd. Default 38400|
|  0x0114  |   |  REG_RS4_SPEED  |  GSR  |  Yes  | Communication speed of the fourth RS232 interface. Value in Bd. Default 38400|
|  0x0115  |   |  REG_ETH_UTILITY  |  GSR  |	 Yes  | Ethernet utility register, [[usp:default_map&#reg_eth_utility_register|see description]]		|
|  0x0116  |  IP3,IP2  |  IP1,IP0  |  GSB  |  Yes  | Module embedded Ethernet IP address |
|  0x0117  |  M3,M2  |  M1,M0  |  GSB  |  Yes  | Module embedded Ethernet Mask |
|  0x0118  |  G3,G2  |  G1,G0  |  GSB  |  Yes  | Module embedded Ethernet Gateway |
|  0x0119  |  D3,D2  |  D1,D0  |  GSB  |  Yes  | Module embedded Ethernet primary DNS server IP |
|  0x011A  |  D3,D2  |  D1,D0  |  GSB  |  Yes  | Module embedded Ethernet secondary DNS server IP |
|  0x011B - 0x011D  |  NBTNAME[0]-[11]  ||  GSB  |  Yes  | 12 bytes, ASCII Alphanumeric NETBIOS name, char[12], LSB at byte 0 of 0x011A  |
|  0x011E  |  MAC3,MAC2  |  MAC1,MAC0  |  GSB  |  Yes  | Module embedded Ethernet MAC Address |
|  0x011F  |    |  MAC5,MAC4  |  GSB  |  Yes  | Module embedded Ethernet MAC Address |

===== Register Description =====

==== REG_RSREG Register ====

The read of the Reset register return the reason for the last reset. In most Microchip devices it maps directly to RCON register.
Write to Reset register causes software reset (RESET instruction) of the MCU. This can be used for example for reset after firmware upgrade etc.

=== Reset register read ===

^  Bit  ^  Description  ^
^  0  | POR: 1 = A Power-on Reset has occurred  |
^  1  | BOR: 1 = A Brown-out Reset has occurred  |
^  2  | IDLE: 1 = Device was in Idle mode  |
^  3  | SLEEP 1 = Device has been in Sleep mode  |
^  4  | WDTO: 1 = WDT time-out has occurred  |
^  5  | SWDTEN: 1 = WDT is enabled  |
^  6  | SWR: 1 = A RESET instruction has been executed  |
^  7  | EXTR: 1 = A Master Clear (pin) Reset has occurred  |
^  8  | Application specific  |
^  9  | CM: 1 = A configuration mismatch Reset has occurred.  |
^  10  | Application specific  |
^  11  | Application specific  |
^  12  | Application specific  |
^  13  | Application specific  |
^  14  | IOPUWR: 1 = An illegal opcode detection, an illegal address mode or uninitialized W register used as an Address Pointer caused a Reset  |
^  15  | TRAPR: 1 = A Trap Conflict Reset has occurred  |

=== Reset register write ===

^ Value  ^ Description  |
^ 0xA3C1  | Perform software Reset  |
==== REG_UTILITY Register ====

^  Bit  ^  Description  ^
|  0  | LED On/Off bit  1 = LED on   0 = LED off |


==== REG_ETH_UTILITY Register ====

^  Bit  ^  Description  ^
|  0  | DHCPEN, 1= DHCP is enabled, 0=DHCP disabled |

==== REG_COMMAND Register ====

Application speciffic, writing to this register will execute a command.